Block-Structured AMR Software Framework
Macros
AMReX_GpuLaunchMacrosC.nolint.H File Reference

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Macros

#define AMREX_GPU_LAUNCH_HOST_DEVICE_LAMBDA_RANGE(TN, TI, block)
 
#define AMREX_GPU_LAUNCH_HOST_DEVICE_LAMBDA_RANGE_2(TN1, TI1, block1, TN2, TI2, block2)
 
#define AMREX_GPU_LAUNCH_HOST_DEVICE_LAMBDA_RANGE_3(TN1, TI1, block1, TN2, TI2, block2, TN3, TI3, block3)
 
#define AMREX_GPU_LAUNCH_DEVICE_LAMBDA_RANGE(...)   AMREX_GPU_LAUNCH_HOST_DEVICE_LAMBDA_RANGE(__VA_ARGS__)
 
#define AMREX_GPU_LAUNCH_DEVICE_LAMBDA_RANGE_2(...)   AMREX_GPU_LAUNCH_HOST_DEVICE_LAMBDA_RANGE_2(__VA_ARGS__)
 
#define AMREX_GPU_LAUNCH_DEVICE_LAMBDA_RANGE_3(...)   AMREX_GPU_LAUNCH_HOST_DEVICE_LAMBDA_RANGE_3(__VA_ARGS__)
 
#define AMREX_GPU_FOR_1D_IMPL(n, i, block)
 
#define AMREX_GPU_PARALLEL_FOR_1D_IMPL(n, i, block)
 
#define AMREX_GPU_FOR_3D_IMPL(box, i, j, k, block)
 
#define AMREX_GPU_PARALLEL_FOR_3D_IMPL(box, i, j, k, block)
 
#define AMREX_GPU_FOR_4D_IMPL(box, ncomp, i, j, k, n, block)
 
#define AMREX_GPU_PARALLEL_FOR_4D_IMPL(box, ncomp, i, j, k, n, block)
 
#define AMREX_GPU_HOST_DEVICE_FOR_1D(...)   AMREX_GPU_FOR_1D_IMPL(__VA_ARGS__);
 
#define AMREX_GPU_DEVICE_FOR_1D(...)   AMREX_GPU_FOR_1D_IMPL(__VA_ARGS__);
 
#define AMREX_GPU_HOST_DEVICE_FOR_3D(...)   AMREX_GPU_FOR_3D_IMPL(__VA_ARGS__);
 
#define AMREX_GPU_DEVICE_FOR_3D(...)   AMREX_GPU_FOR_3D_IMPL(__VA_ARGS__);
 
#define AMREX_GPU_HOST_DEVICE_FOR_4D(...)   AMREX_GPU_FOR_4D_IMPL(__VA_ARGS__);
 
#define AMREX_GPU_DEVICE_FOR_4D(...)   AMREX_GPU_FOR_4D_IMPL(__VA_ARGS__);
 
#define AMREX_GPU_DEVICE_PARALLEL_FOR_1D(...)   AMREX_GPU_PARALLEL_FOR_1D_IMPL(__VA_ARGS__);
 
#define AMREX_GPU_DEVICE_PARALLEL_FOR_3D(...)   AMREX_GPU_PARALLEL_FOR_3D_IMPL(__VA_ARGS__);
 
#define AMREX_GPU_DEVICE_PARALLEL_FOR_4D(...)   AMREX_GPU_PARALLEL_FOR_4D_IMPL(__VA_ARGS__);
 
#define AMREX_GPU_HOST_DEVICE_PARALLEL_FOR_1D(...)   AMREX_GPU_PARALLEL_FOR_1D_IMPL(__VA_ARGS__);
 
#define AMREX_GPU_HOST_DEVICE_PARALLEL_FOR_3D(...)   AMREX_GPU_PARALLEL_FOR_3D_IMPL(__VA_ARGS__);
 
#define AMREX_GPU_HOST_DEVICE_PARALLEL_FOR_4D(...)   AMREX_GPU_PARALLEL_FOR_4D_IMPL(__VA_ARGS__);
 

Macro Definition Documentation

◆ AMREX_GPU_DEVICE_FOR_1D

#define AMREX_GPU_DEVICE_FOR_1D (   ...)    AMREX_GPU_FOR_1D_IMPL(__VA_ARGS__);

◆ AMREX_GPU_DEVICE_FOR_3D

#define AMREX_GPU_DEVICE_FOR_3D (   ...)    AMREX_GPU_FOR_3D_IMPL(__VA_ARGS__);

◆ AMREX_GPU_DEVICE_FOR_4D

#define AMREX_GPU_DEVICE_FOR_4D (   ...)    AMREX_GPU_FOR_4D_IMPL(__VA_ARGS__);

◆ AMREX_GPU_DEVICE_PARALLEL_FOR_1D

#define AMREX_GPU_DEVICE_PARALLEL_FOR_1D (   ...)    AMREX_GPU_PARALLEL_FOR_1D_IMPL(__VA_ARGS__);

◆ AMREX_GPU_DEVICE_PARALLEL_FOR_3D

#define AMREX_GPU_DEVICE_PARALLEL_FOR_3D (   ...)    AMREX_GPU_PARALLEL_FOR_3D_IMPL(__VA_ARGS__);

◆ AMREX_GPU_DEVICE_PARALLEL_FOR_4D

#define AMREX_GPU_DEVICE_PARALLEL_FOR_4D (   ...)    AMREX_GPU_PARALLEL_FOR_4D_IMPL(__VA_ARGS__);

◆ AMREX_GPU_FOR_1D_IMPL

#define AMREX_GPU_FOR_1D_IMPL (   n,
  i,
  block 
)
Value:
for (auto i = decltype(n){0}; i < n; ++i) { \
block \
}

◆ AMREX_GPU_FOR_3D_IMPL

#define AMREX_GPU_FOR_3D_IMPL (   box,
  i,
  j,
  k,
  block 
)
Value:
{ \
const auto amrex_i_lo = amrex::lbound(box); \
const auto amrex_i_hi = amrex::ubound(box); \
for (int k = amrex_i_lo.z; k <= amrex_i_hi.z; ++k) { \
for (int j = amrex_i_lo.y; j <= amrex_i_hi.y; ++j) { \
for (int i = amrex_i_lo.x; i <= amrex_i_hi.x; ++i) { \
block \
}}} \
}
amrex::ubound
AMREX_GPU_HOST_DEVICE AMREX_FORCE_INLINE Dim3 ubound(Array4< T > const &a) noexcept
Definition: AMReX_Array4.H:315
amrex::lbound
AMREX_GPU_HOST_DEVICE AMREX_FORCE_INLINE Dim3 lbound(Array4< T > const &a) noexcept
Definition: AMReX_Array4.H:308

◆ AMREX_GPU_FOR_4D_IMPL

#define AMREX_GPU_FOR_4D_IMPL (   box,
  ncomp,
  i,
  j,
  k,
  n,
  block 
)
Value:
{ \
const auto amrex_i_lo = amrex::lbound(box); \
const auto amrex_i_hi = amrex::ubound(box); \
for (int n = 0; n < ncomp; ++n) { \
for (int k = amrex_i_lo.z; k <= amrex_i_hi.z; ++k) { \
for (int j = amrex_i_lo.y; j <= amrex_i_hi.y; ++j) { \
for (int i = amrex_i_lo.x; i <= amrex_i_hi.x; ++i) { \
block \
}}}} \
}

◆ AMREX_GPU_HOST_DEVICE_FOR_1D

#define AMREX_GPU_HOST_DEVICE_FOR_1D (   ...)    AMREX_GPU_FOR_1D_IMPL(__VA_ARGS__);

◆ AMREX_GPU_HOST_DEVICE_FOR_3D

#define AMREX_GPU_HOST_DEVICE_FOR_3D (   ...)    AMREX_GPU_FOR_3D_IMPL(__VA_ARGS__);

◆ AMREX_GPU_HOST_DEVICE_FOR_4D

#define AMREX_GPU_HOST_DEVICE_FOR_4D (   ...)    AMREX_GPU_FOR_4D_IMPL(__VA_ARGS__);

◆ AMREX_GPU_HOST_DEVICE_PARALLEL_FOR_1D

#define AMREX_GPU_HOST_DEVICE_PARALLEL_FOR_1D (   ...)    AMREX_GPU_PARALLEL_FOR_1D_IMPL(__VA_ARGS__);

◆ AMREX_GPU_HOST_DEVICE_PARALLEL_FOR_3D

#define AMREX_GPU_HOST_DEVICE_PARALLEL_FOR_3D (   ...)    AMREX_GPU_PARALLEL_FOR_3D_IMPL(__VA_ARGS__);

◆ AMREX_GPU_HOST_DEVICE_PARALLEL_FOR_4D

#define AMREX_GPU_HOST_DEVICE_PARALLEL_FOR_4D (   ...)    AMREX_GPU_PARALLEL_FOR_4D_IMPL(__VA_ARGS__);

◆ AMREX_GPU_LAUNCH_DEVICE_LAMBDA_RANGE

#define AMREX_GPU_LAUNCH_DEVICE_LAMBDA_RANGE (   ...)    AMREX_GPU_LAUNCH_HOST_DEVICE_LAMBDA_RANGE(__VA_ARGS__)

◆ AMREX_GPU_LAUNCH_DEVICE_LAMBDA_RANGE_2

#define AMREX_GPU_LAUNCH_DEVICE_LAMBDA_RANGE_2 (   ...)    AMREX_GPU_LAUNCH_HOST_DEVICE_LAMBDA_RANGE_2(__VA_ARGS__)

◆ AMREX_GPU_LAUNCH_DEVICE_LAMBDA_RANGE_3

#define AMREX_GPU_LAUNCH_DEVICE_LAMBDA_RANGE_3 (   ...)    AMREX_GPU_LAUNCH_HOST_DEVICE_LAMBDA_RANGE_3(__VA_ARGS__)

◆ AMREX_GPU_LAUNCH_HOST_DEVICE_LAMBDA_RANGE

#define AMREX_GPU_LAUNCH_HOST_DEVICE_LAMBDA_RANGE (   TN,
  TI,
  block 
)
Value:
{ \
for (auto const TI : amrex::Gpu::Range(TN)) { \
block \
} \
}
amrex::Gpu::Range
AMREX_GPU_HOST_DEVICE range_detail::range_impl< T > Range(T const &b) noexcept
Definition: AMReX_GpuRange.H:125

◆ AMREX_GPU_LAUNCH_HOST_DEVICE_LAMBDA_RANGE_2

#define AMREX_GPU_LAUNCH_HOST_DEVICE_LAMBDA_RANGE_2 (   TN1,
  TI1,
  block1,
  TN2,
  TI2,
  block2 
)
Value:
{ \
for (auto const TI1 : amrex::Gpu::Range(TN1)) { \
block1 \
} \
for (auto const TI2 : amrex::Gpu::Range(TN2)) { \
block2 \
} \
}

◆ AMREX_GPU_LAUNCH_HOST_DEVICE_LAMBDA_RANGE_3

#define AMREX_GPU_LAUNCH_HOST_DEVICE_LAMBDA_RANGE_3 (   TN1,
  TI1,
  block1,
  TN2,
  TI2,
  block2,
  TN3,
  TI3,
  block3 
)
Value:
{ \
for (auto const TI1 : amrex::Gpu::Range(TN1)) { \
block1 \
} \
for (auto const TI2 : amrex::Gpu::Range(TN2)) { \
block2 \
} \
for (auto const TI3 : amrex::Gpu::Range(TN3)) { \
block3 \
} \
}

◆ AMREX_GPU_PARALLEL_FOR_1D_IMPL

#define AMREX_GPU_PARALLEL_FOR_1D_IMPL (   n,
  i,
  block 
)
Value:
AMREX_PRAGMA_SIMD \
for (auto i = decltype(n){0}; i < n; ++i) { \
block \
}

◆ AMREX_GPU_PARALLEL_FOR_3D_IMPL

#define AMREX_GPU_PARALLEL_FOR_3D_IMPL (   box,
  i,
  j,
  k,
  block 
)
Value:
{ \
const auto amrex_i_lo = amrex::lbound(box); \
const auto amrex_i_hi = amrex::ubound(box); \
for (int k = amrex_i_lo.z; k <= amrex_i_hi.z; ++k) { \
for (int j = amrex_i_lo.y; j <= amrex_i_hi.y; ++j) { \
AMREX_PRAGMA_SIMD \
for (int i = amrex_i_lo.x; i <= amrex_i_hi.x; ++i) { \
block \
}}} \
}

◆ AMREX_GPU_PARALLEL_FOR_4D_IMPL

#define AMREX_GPU_PARALLEL_FOR_4D_IMPL (   box,
  ncomp,
  i,
  j,
  k,
  n,
  block 
)
Value:
{ \
const auto amrex_i_lo = amrex::lbound(box); \
const auto amrex_i_hi = amrex::ubound(box); \
for (int n = 0; n < ncomp; ++n) { \
for (int k = amrex_i_lo.z; k <= amrex_i_hi.z; ++k) { \
for (int j = amrex_i_lo.y; j <= amrex_i_hi.y; ++j) { \
AMREX_PRAGMA_SIMD \
for (int i = amrex_i_lo.x; i <= amrex_i_hi.x; ++i) { \
block \
}}}} \
}