Block-Structured AMR Software Framework
Loading...
Searching...
No Matches
AMReX_Scan.H
Go to the documentation of this file.
1#ifndef AMREX_SCAN_H_
2#define AMREX_SCAN_H_
3#include <AMReX_Config.H>
4
5#include <AMReX_Extension.H>
6#include <AMReX_Gpu.H>
7#include <AMReX_Arena.H>
8
9#if defined(AMREX_USE_CUDA)
10# include <cub/cub.cuh>
11# ifdef AMREX_CUDA_CCCL_VER_GE_2_8
12# include <thrust/iterator/transform_iterator.h>
13# endif
14#elif defined(AMREX_USE_HIP)
15# include <rocprim/rocprim.hpp>
16#elif defined(AMREX_USE_SYCL) && defined(AMREX_USE_ONEDPL)
17# include <oneapi/dpl/execution>
18# include <oneapi/dpl/numeric>
19#endif
20
21#include <concepts>
22#include <cstdint>
23#include <iterator>
24#include <numeric>
25#include <type_traits>
26
27namespace amrex {
28namespace Scan {
29
30struct RetSum {
31 bool flag = true;
32 explicit operator bool() const noexcept { return flag; }
33};
34static constexpr RetSum retSum{true};
35static constexpr RetSum noRetSum{false};
36
37namespace Type {
38 static constexpr struct Inclusive {} inclusive{};
39 static constexpr struct Exclusive {} exclusive{};
40}
41
42#if defined(AMREX_USE_GPU)
43
45namespace detail {
46
47template <typename T>
48struct STVA
49{
50 char status;
51 T value;
52};
53
54template <typename T, bool SINGLE_WORD> struct BlockStatus {};
55
56template <typename T>
57struct BlockStatus<T, true>
58{
59 template<typename U>
60 union Data {
61 STVA<U> s;
62 uint64_t i;
63 void operator=(Data<U> const&) = delete;
64 void operator=(Data<U> &&) = delete;
65 };
66 Data<T> d;
67
69 void write (char a_status, T a_value) {
70#if defined(AMREX_USE_CUDA)
71 volatile uint64_t tmp;
72 reinterpret_cast<STVA<T> volatile&>(tmp).status = a_status;
73 reinterpret_cast<STVA<T> volatile&>(tmp).value = a_value;
74 reinterpret_cast<uint64_t&>(d.s) = tmp;
75#else
76 Data<T> tmp;
77 tmp.s = {a_status, a_value};
78 static_assert(sizeof(unsigned long long) == sizeof(uint64_t),
79 "HIP/SYCL: unsigned long long must be 64 bits");
80 Gpu::Atomic::Exch(reinterpret_cast<unsigned long long*>(&d),
81 reinterpret_cast<unsigned long long&>(tmp));
82#endif
83 }
84
86 T get_aggregate() const { return d.s.value; }
87
89 STVA<T> read () volatile {
90#if defined(AMREX_USE_CUDA)
91 volatile uint64_t tmp = reinterpret_cast<uint64_t volatile&>(d);
92 return {reinterpret_cast<STVA<T> volatile&>(tmp).status,
93 reinterpret_cast<STVA<T> volatile&>(tmp).value };
94#else
95 static_assert(sizeof(unsigned long long) == sizeof(uint64_t),
96 "HIP/SYCL: unsigned long long must be 64 bits");
97 unsigned long long tmp = Gpu::Atomic::Add
98 (reinterpret_cast<unsigned long long*>(const_cast<Data<T>*>(&d)), 0ull);
99 return (*reinterpret_cast<Data<T>*>(&tmp)).s;
100#endif
101 }
102
104 void set_status (char a_status) { d.s.status = a_status; }
105
107 STVA<T> wait () volatile {
108 STVA<T> r;
109 do {
110#if defined(AMREX_USE_SYCL)
111 sycl::atomic_fence(sycl::memory_order::acq_rel, sycl::memory_scope::work_group);
112#else
113 __threadfence_block();
114#endif
115 r = read();
116 } while (r.status == 'x');
117 return r;
118 }
119};
120
121template <typename T>
122struct BlockStatus<T, false>
123{
124 T aggregate;
125 T inclusive;
126 char status;
127
129 void write (char a_status, T a_value) {
130 if (a_status == 'a') {
131 aggregate = a_value;
132 } else {
133 inclusive = a_value;
134 }
135#if defined(AMREX_USE_SYCL)
136 sycl::atomic_fence(sycl::memory_order::acq_rel, sycl::memory_scope::device);
137#else
138 __threadfence();
139#endif
140 status = a_status;
141 }
142
144 T get_aggregate() const { return aggregate; }
145
147 STVA<T> read () volatile {
148#if defined(AMREX_USE_SYCL)
149 constexpr auto mo = sycl::memory_order::relaxed;
150 constexpr auto ms = sycl::memory_scope::device;
151 constexpr auto as = sycl::access::address_space::global_space;
152#endif
153 if (status == 'x') {
154 return {'x', 0};
155 } else if (status == 'a') {
156#if defined(AMREX_USE_SYCL)
157 sycl::atomic_ref<T,mo,ms,as> ar{const_cast<T&>(aggregate)};
158 return {'a', ar.load()};
159#else
160 return {'a', aggregate};
161#endif
162 } else {
163#if defined(AMREX_USE_SYCL)
164 sycl::atomic_ref<T,mo,ms,as> ar{const_cast<T&>(inclusive)};
165 return {'p', ar.load()};
166#else
167 return {'p', inclusive};
168#endif
169 }
170 }
171
173 void set_status (char a_status) { status = a_status; }
174
176 STVA<T> wait () volatile {
177 STVA<T> r;
178 do {
179 r = read();
180#if defined(AMREX_USE_SYCL)
181 sycl::atomic_fence(sycl::memory_order::acq_rel, sycl::memory_scope::device);
182#else
183 __threadfence();
184#endif
185 } while (r.status == 'x');
186 return r;
187 }
188};
189
190}
192
193#if defined(AMREX_USE_SYCL)
194
195#ifndef AMREX_SYCL_NO_MULTIPASS_SCAN
196template <typename T, std::integral N, typename FIN, typename FOUT, typename TYPE>
197T PrefixSum_mp (N n, FIN const& fin, FOUT const& fout, TYPE, RetSum a_ret_sum)
198{
199 if (n <= 0) { return 0; }
200 constexpr int nwarps_per_block = 8;
201 constexpr int nthreads = nwarps_per_block*Gpu::Device::warp_size;
202 constexpr int nchunks = 12;
203 constexpr int nelms_per_block = nthreads * nchunks;
204 AMREX_ALWAYS_ASSERT(static_cast<Long>(n) < static_cast<Long>(
205 std::numeric_limits<int>::max())*nelms_per_block);
206 int nblocks = (static_cast<Long>(n) + nelms_per_block - 1) / nelms_per_block;
207 std::size_t sm = sizeof(T) * (Gpu::Device::warp_size + nwarps_per_block);
208 auto stream = Gpu::gpuStream();
209
210 std::size_t nbytes_blockresult = Arena::align(sizeof(T)*n);
211 std::size_t nbytes_blocksum = Arena::align(sizeof(T)*nblocks);
212 std::size_t nbytes_totalsum = Arena::align(sizeof(T));
213 auto dp = (char*)(The_Arena()->alloc(nbytes_blockresult
214 + nbytes_blocksum
215 + nbytes_totalsum));
216 T* blockresult_p = (T*)dp;
217 T* blocksum_p = (T*)(dp + nbytes_blockresult);
218 T* totalsum_p = (T*)(dp + nbytes_blockresult + nbytes_blocksum);
219
220 amrex::launch<nthreads>(nblocks, sm, stream,
221 [=] AMREX_GPU_DEVICE (Gpu::Handler const& gh) noexcept
222 {
223 sycl::sub_group const& sg = gh.item->get_sub_group();
224 int lane = sg.get_local_id()[0];
225 int warp = sg.get_group_id()[0];
226 int nwarps = sg.get_group_range()[0];
227
228 int threadIdxx = gh.item->get_local_id(0);
229 int blockIdxx = gh.item->get_group_linear_id();
230 int blockDimx = gh.item->get_local_range(0);
231
232 T* shared = (T*)(gh.local);
233 T* shared2 = shared + Gpu::Device::warp_size;
234
235 // Each block processes [ibegin,iend).
236 N ibegin = static_cast<N>(nelms_per_block) * blockIdxx;
237 N iend = amrex::min(static_cast<N>(ibegin+nelms_per_block), n);
238
239 // Each block is responsible for nchunks chunks of data,
240 // where each chunk has blockDim.x elements, one for each
241 // thread in the block.
242 T sum_prev_chunk = 0; // inclusive sum from previous chunks.
243 for (int ichunk = 0; ichunk < nchunks; ++ichunk) {
244 N offset = ibegin + ichunk*blockDimx;
245 if (offset >= iend) { break; }
246
247 offset += threadIdxx;
248 T x0 = (offset < iend) ? fin(offset) : 0;
249 T x = x0;
250 // Scan within a warp
251 for (int i = 1; i <= Gpu::Device::warp_size; i *= 2) {
252 T s = sycl::shift_group_right(sg, x, i);
253 if (lane >= i) { x += s; }
254 }
255
256 // x now holds the inclusive sum within the warp. The
257 // last thread in each warp holds the inclusive sum of
258 // this warp. We will store it in shared memory.
259 if (lane == Gpu::Device::warp_size - 1) {
260 shared[warp] = x;
261 }
262
263 gh.item->barrier(sycl::access::fence_space::local_space);
264
265 // The first warp will do scan on the warp sums for the
266 // whole block.
267 if (warp == 0) {
268 T y = (lane < nwarps) ? shared[lane] : 0;
269 for (int i = 1; i <= Gpu::Device::warp_size; i *= 2) {
270 T s = sycl::shift_group_right(sg, y, i);
271 if (lane >= i) { y += s; }
272 }
273
274 if (lane < nwarps) { shared2[lane] = y; }
275 }
276
277 gh.item->barrier(sycl::access::fence_space::local_space);
278
279 // shared[0:nwarps) holds the inclusive sum of warp sums.
280
281 // Also note x still holds the inclusive sum within the
282 // warp. Given these two, we can compute the inclusive
283 // sum within this chunk.
284 T sum_prev_warp = (warp == 0) ? 0 : shared2[warp-1];
285 T tmp_out = sum_prev_warp + sum_prev_chunk +
286 (std::is_same_v<std::decay_t<TYPE>,Type::Inclusive> ? x : x-x0);
287 sum_prev_chunk += shared2[nwarps-1];
288
289 if (offset < iend) {
290 blockresult_p[offset] = tmp_out;
291 }
292 }
293
294 // sum_prev_chunk now holds the sum of the whole block.
295 if (threadIdxx == 0) {
296 blocksum_p[blockIdxx] = sum_prev_chunk;
297 }
298 });
299
300 amrex::launch<nthreads>(1, sm, stream,
301 [=] AMREX_GPU_DEVICE (Gpu::Handler const& gh) noexcept
302 {
303 sycl::sub_group const& sg = gh.item->get_sub_group();
304 int lane = sg.get_local_id()[0];
305 int warp = sg.get_group_id()[0];
306 int nwarps = sg.get_group_range()[0];
307
308 int threadIdxx = gh.item->get_local_id(0);
309 int blockDimx = gh.item->get_local_range(0);
310
311 T* shared = (T*)(gh.local);
312 T* shared2 = shared + Gpu::Device::warp_size;
313
314 T sum_prev_chunk = 0;
315 for (int offset = threadIdxx; offset - threadIdxx < nblocks; offset += blockDimx) {
316 T x = (offset < nblocks) ? blocksum_p[offset] : 0;
317 // Scan within a warp
318 for (int i = 1; i <= Gpu::Device::warp_size; i *= 2) {
319 T s = sycl::shift_group_right(sg, x, i);
320 if (lane >= i) { x += s; }
321 }
322
323 // x now holds the inclusive sum within the warp. The
324 // last thread in each warp holds the inclusive sum of
325 // this warp. We will store it in shared memory.
326 if (lane == Gpu::Device::warp_size - 1) {
327 shared[warp] = x;
328 }
329
330 gh.item->barrier(sycl::access::fence_space::local_space);
331
332 // The first warp will do scan on the warp sums for the
333 // whole block.
334 if (warp == 0) {
335 T y = (lane < nwarps) ? shared[lane] : 0;
336 for (int i = 1; i <= Gpu::Device::warp_size; i *= 2) {
337 T s = sycl::shift_group_right(sg, y, i);
338 if (lane >= i) { y += s; }
339 }
340
341 if (lane < nwarps) { shared2[lane] = y; }
342 }
343
344 gh.item->barrier(sycl::access::fence_space::local_space);
345
346 // shared[0:nwarps) holds the inclusive sum of warp sums.
347
348 // Also note x still holds the inclusive sum within the
349 // warp. Given these two, we can compute the inclusive
350 // sum within this chunk.
351 T sum_prev_warp = (warp == 0) ? 0 : shared2[warp-1];
352 T tmp_out = sum_prev_warp + sum_prev_chunk + x;
353 sum_prev_chunk += shared2[nwarps-1];
354
355 if (offset < nblocks) {
356 blocksum_p[offset] = tmp_out;
357 }
358 }
359
360 // sum_prev_chunk now holds the total sum.
361 if (threadIdxx == 0) {
362 *totalsum_p = sum_prev_chunk;
363 }
364 });
365
366 amrex::launch<nthreads>(nblocks, 0, stream,
367 [=] AMREX_GPU_DEVICE (Gpu::Handler const& gh) noexcept
368 {
369 int threadIdxx = gh.item->get_local_id(0);
370 int blockIdxx = gh.item->get_group_linear_id();
371 int blockDimx = gh.item->get_local_range(0);
372
373 // Each block processes [ibegin,iend).
374 N ibegin = static_cast<N>(nelms_per_block) * blockIdxx;
375 N iend = amrex::min(static_cast<N>(ibegin+nelms_per_block), n);
376 T prev_sum = (blockIdxx == 0) ? 0 : blocksum_p[blockIdxx-1];
377 for (N offset = ibegin + threadIdxx; offset < iend; offset += blockDimx) {
378 fout(offset, prev_sum + blockresult_p[offset]);
379 }
380 });
381
382 T totalsum = 0;
383 if (a_ret_sum) {
384 Gpu::dtoh_memcpy_async(&totalsum, totalsum_p, sizeof(T));
385
387 The_Arena()->free(dp);
388
390 } else {
392 }
393
394 return totalsum;
395}
396#endif
397
398template <typename T, std::integral N, typename FIN, typename FOUT, typename TYPE>
399requires (std::same_as<std::decay_t<TYPE>,Type::Inclusive> ||
400 std::same_as<std::decay_t<TYPE>,Type::Exclusive>)
401T PrefixSum (N n, FIN && fin, FOUT && fout, TYPE type, RetSum a_ret_sum = retSum)
402{
403 if (n <= 0) { return 0; }
404 constexpr int nwarps_per_block = 8;
405 constexpr int nthreads = nwarps_per_block*Gpu::Device::warp_size;
406 constexpr int nchunks = 12;
407 constexpr int nelms_per_block = nthreads * nchunks;
408 AMREX_ALWAYS_ASSERT(static_cast<Long>(n) < static_cast<Long>(
409 std::numeric_limits<int>::max())*nelms_per_block);
410 int nblocks = (static_cast<Long>(n) + nelms_per_block - 1) / nelms_per_block;
411
412#ifndef AMREX_SYCL_NO_MULTIPASS_SCAN
413 if (nblocks > 1) {
414 return PrefixSum_mp<T>(n, std::forward<FIN>(fin), std::forward<FOUT>(fout), type, a_ret_sum);
415 }
416#endif
417
418 std::size_t sm = sizeof(T) * (Gpu::Device::warp_size + nwarps_per_block) + sizeof(int);
419 auto stream = Gpu::gpuStream();
420
421 using BlockStatusT = std::conditional_t<sizeof(detail::STVA<T>) <= 8,
422 detail::BlockStatus<T,true>, detail::BlockStatus<T,false> >;
423
424 std::size_t nbytes_blockstatus = Arena::align(sizeof(BlockStatusT)*nblocks);
425 std::size_t nbytes_blockid = Arena::align(sizeof(unsigned int));
426 std::size_t nbytes_totalsum = Arena::align(sizeof(T));
427 auto dp = (char*)(The_Arena()->alloc( nbytes_blockstatus
428 + nbytes_blockid
429 + nbytes_totalsum));
430 BlockStatusT* AMREX_RESTRICT block_status_p = (BlockStatusT*)dp;
431 unsigned int* AMREX_RESTRICT virtual_block_id_p = (unsigned int*)(dp + nbytes_blockstatus);
432 T* AMREX_RESTRICT totalsum_p = (T*)(dp + nbytes_blockstatus + nbytes_blockid);
433
434 amrex::ParallelFor(nblocks, [=] AMREX_GPU_DEVICE (int i) noexcept {
435 BlockStatusT& block_status = block_status_p[i];
436 block_status.set_status('x');
437 if (i == 0) {
438 *virtual_block_id_p = 0;
439 *totalsum_p = 0;
440 }
441 });
442
443 amrex::launch<nthreads>(nblocks, sm, stream,
444 [=] AMREX_GPU_DEVICE (Gpu::Handler const& gh) noexcept
445 {
446 sycl::sub_group const& sg = gh.item->get_sub_group();
447 int lane = sg.get_local_id()[0];
448 int warp = sg.get_group_id()[0];
449 int nwarps = sg.get_group_range()[0];
450
451 int threadIdxx = gh.item->get_local_id(0);
452 int blockDimx = gh.item->get_local_range(0);
453 int gridDimx = gh.item->get_group_range(0);
454
455 T* shared = (T*)(gh.local);
456 T* shared2 = shared + Gpu::Device::warp_size;
457
458 // First of all, get block virtual id. We must do this to
459 // avoid deadlock because blocks may be launched in any order.
460 // Anywhere in this function, we should not use blockIdx.
461 int virtual_block_id = 0;
462 if (gridDimx > 1) {
463 int& virtual_block_id_shared = *((int*)(shared2+nwarps));
464 if (threadIdxx == 0) {
465 unsigned int bid = Gpu::Atomic::Add(virtual_block_id_p, 1u);
466 virtual_block_id_shared = bid;
467 }
468 gh.item->barrier(sycl::access::fence_space::local_space);
469 virtual_block_id = virtual_block_id_shared;
470 }
471
472 // Each block processes [ibegin,iend).
473 N ibegin = static_cast<N>(nelms_per_block) * virtual_block_id;
474 N iend = amrex::min(static_cast<N>(ibegin+nelms_per_block), n);
475 BlockStatusT& block_status = block_status_p[virtual_block_id];
476
477 //
478 // The overall algorithm is based on "Single-pass Parallel
479 // Prefix Scan with Decoupled Look-back" by D. Merrill &
480 // M. Garland.
481 //
482
483 // Each block is responsible for nchunks chunks of data,
484 // where each chunk has blockDim.x elements, one for each
485 // thread in the block.
486 T sum_prev_chunk = 0; // inclusive sum from previous chunks.
487 T tmp_out[nchunks]; // block-wide inclusive sum for chunks
488 for (int ichunk = 0; ichunk < nchunks; ++ichunk) {
489 N offset = ibegin + ichunk*blockDimx;
490 if (offset >= iend) { break; }
491
492 offset += threadIdxx;
493 T x0 = (offset < iend) ? fin(offset) : 0;
494 if (std::is_same_v<std::decay_t<TYPE>,Type::Exclusive> && offset == n-1) {
495 *totalsum_p += x0;
496 }
497 T x = x0;
498 // Scan within a warp
499 for (int i = 1; i <= Gpu::Device::warp_size; i *= 2) {
500 T s = sycl::shift_group_right(sg, x, i);
501 if (lane >= i) { x += s; }
502 }
503
504 // x now holds the inclusive sum within the warp. The
505 // last thread in each warp holds the inclusive sum of
506 // this warp. We will store it in shared memory.
507 if (lane == Gpu::Device::warp_size - 1) {
508 shared[warp] = x;
509 }
510
511 gh.item->barrier(sycl::access::fence_space::local_space);
512
513 // The first warp will do scan on the warp sums for the
514 // whole block.
515 if (warp == 0) {
516 T y = (lane < nwarps) ? shared[lane] : 0;
517 for (int i = 1; i <= Gpu::Device::warp_size; i *= 2) {
518 T s = sycl::shift_group_right(sg, y, i);
519 if (lane >= i) { y += s; }
520 }
521
522 if (lane < nwarps) { shared2[lane] = y; }
523 }
524
525 gh.item->barrier(sycl::access::fence_space::local_space);
526
527 // shared[0:nwarps) holds the inclusive sum of warp sums.
528
529 // Also note x still holds the inclusive sum within the
530 // warp. Given these two, we can compute the inclusive
531 // sum within this chunk.
532 T sum_prev_warp = (warp == 0) ? 0 : shared2[warp-1];
533 tmp_out[ichunk] = sum_prev_warp + sum_prev_chunk +
534 (std::is_same_v<std::decay_t<TYPE>,Type::Inclusive> ? x : x-x0);
535 sum_prev_chunk += shared2[nwarps-1];
536 }
537
538 // sum_prev_chunk now holds the sum of the whole block.
539 if (threadIdxx == 0 && gridDimx > 1) {
540 block_status.write((virtual_block_id == 0) ? 'p' : 'a',
541 sum_prev_chunk);
542 }
543
544 if (virtual_block_id == 0) {
545 for (int ichunk = 0; ichunk < nchunks; ++ichunk) {
546 N offset = ibegin + ichunk*blockDimx + threadIdxx;
547 if (offset >= iend) { break; }
548 fout(offset, tmp_out[ichunk]);
549 if (offset == n-1) {
550 *totalsum_p += tmp_out[ichunk];
551 }
552 }
553 } else if (virtual_block_id > 0) {
554
555 if (warp == 0) {
556 T exclusive_prefix = 0;
557 BlockStatusT volatile* pbs = block_status_p;
558 for (int iblock0 = virtual_block_id-1; iblock0 >= 0; iblock0 -= Gpu::Device::warp_size)
559 {
560 int iblock = iblock0-lane;
561 detail::STVA<T> stva{'p', 0};
562 if (iblock >= 0) {
563 stva = pbs[iblock].wait();
564 }
565
566 T x = stva.value;
567
568 // implement our own __ballot
569 unsigned status_bf = (stva.status == 'p') ? (0x1u << lane) : 0;
570 for (int i = 1; i < Gpu::Device::warp_size; i *= 2) {
571 status_bf |= sycl::permute_group_by_xor(sg, status_bf, i);
572 }
573
574 bool stop_lookback = status_bf & 0x1u;
575 if (stop_lookback == false) {
576 if (status_bf != 0) {
577 T y = x;
578 if (lane > 0) { x = 0; }
579 unsigned int bit_mask = 0x1u;
580 for (int i = 1; i < Gpu::Device::warp_size; ++i) {
581 bit_mask <<= 1;
582 if (i == lane) { x = y; }
583 if (status_bf & bit_mask) {
584 stop_lookback = true;
585 break;
586 }
587 }
588 }
589
590 for (int i = Gpu::Device::warp_size/2; i > 0; i /= 2) {
591 x += sycl::shift_group_left(sg, x,i);
592 }
593 }
594
595 if (lane == 0) { exclusive_prefix += x; }
596 if (stop_lookback) { break; }
597 }
598
599 if (lane == 0) {
600 block_status.write('p', block_status.get_aggregate() + exclusive_prefix);
601 shared[0] = exclusive_prefix;
602 }
603 }
604
605 gh.item->barrier(sycl::access::fence_space::local_space);
606
607 T exclusive_prefix = shared[0];
608
609 for (int ichunk = 0; ichunk < nchunks; ++ichunk) {
610 N offset = ibegin + ichunk*blockDimx + threadIdxx;
611 if (offset >= iend) { break; }
612 T t = tmp_out[ichunk] + exclusive_prefix;
613 fout(offset, t);
614 if (offset == n-1) {
615 *totalsum_p += t;
616 }
617 }
618 }
619 });
620
621 T totalsum = 0;
622 if (a_ret_sum) {
623 // xxxxx SYCL todo: Should test if using pinned memory and thus
624 // avoiding memcpy is faster.
625 Gpu::dtoh_memcpy_async(&totalsum, totalsum_p, sizeof(T));
626
628 The_Arena()->free(dp);
629
631 } else {
633 }
634
635 return totalsum;
636}
637
638#elif defined(AMREX_USE_HIP)
639
640template <typename T, std::integral N, typename FIN, typename FOUT, typename TYPE>
641requires (std::same_as<std::decay_t<TYPE>,Type::Inclusive> ||
642 std::same_as<std::decay_t<TYPE>,Type::Exclusive>)
643T PrefixSum (N n, FIN const& fin, FOUT const& fout, TYPE, RetSum a_ret_sum = retSum)
644{
645 if (n <= 0) { return 0; }
646 constexpr int nwarps_per_block = 4;
647 constexpr int nthreads = nwarps_per_block*Gpu::Device::warp_size; // # of threads per block
648 constexpr int nelms_per_thread = sizeof(T) >= 8 ? 8 : 16;
649 constexpr int nelms_per_block = nthreads * nelms_per_thread;
650 AMREX_ALWAYS_ASSERT(static_cast<Long>(n) < static_cast<Long>(
651 std::numeric_limits<int>::max())*nelms_per_block);
652 int nblocks = (n + nelms_per_block - 1) / nelms_per_block;
653 std::size_t sm = 0;
654 auto stream = Gpu::gpuStream();
655
656 using ScanTileState = rocprim::detail::lookback_scan_state<T>;
657 using OrderedBlockId = rocprim::detail::ordered_block_id<unsigned int>;
658
659#if (defined(HIP_VERSION_MAJOR) && (HIP_VERSION_MAJOR < 6)) || \
660 (defined(HIP_VERSION_MAJOR) && (HIP_VERSION_MAJOR == 6) && \
661 defined(HIP_VERSION_MINOR) && (HIP_VERSION_MINOR == 0))
662
663 std::size_t nbytes_tile_state = rocprim::detail::align_size
664 (ScanTileState::get_storage_size(nblocks));
665 std::size_t nbytes_block_id = OrderedBlockId::get_storage_size();
666
667 auto dp = (char*)(The_Arena()->alloc(nbytes_tile_state+nbytes_block_id));
668
669 ScanTileState tile_state = ScanTileState::create(dp, nblocks);
670
671#else
672
673 std::size_t nbytes_tile_state;
674 AMREX_HIP_SAFE_CALL(ScanTileState::get_storage_size(nblocks, stream, nbytes_tile_state));
675 nbytes_tile_state = rocprim::detail::align_size(nbytes_tile_state);
676
677 std::size_t nbytes_block_id = OrderedBlockId::get_storage_size();
678
679 auto dp = (char*)(The_Arena()->alloc(nbytes_tile_state+nbytes_block_id));
680
681 ScanTileState tile_state;
682 AMREX_HIP_SAFE_CALL(ScanTileState::create(tile_state, dp, nblocks, stream));
683
684#endif
685
686 auto ordered_block_id = OrderedBlockId::create
687 (reinterpret_cast<OrderedBlockId::id_type*>(dp + nbytes_tile_state));
688
689 // Init ScanTileState on device
690 amrex::launch<nthreads>((nblocks+nthreads-1)/nthreads, 0, stream, [=] AMREX_GPU_DEVICE ()
691 {
692 auto& scan_tile_state = const_cast<ScanTileState&>(tile_state);
693 auto& scan_bid = const_cast<OrderedBlockId&>(ordered_block_id);
694 const unsigned int gid = blockIdx.x*nthreads + threadIdx.x;
695 if (gid == 0) { scan_bid.reset(); }
696 scan_tile_state.initialize_prefix(gid, nblocks);
697 });
698
699 T* totalsum_p = (a_ret_sum) ? (T*)(The_Pinned_Arena()->alloc(sizeof(T))) : nullptr;
700
701 amrex::launch_global<nthreads> <<<nblocks, nthreads, sm, stream>>> (
702 [=] AMREX_GPU_DEVICE () noexcept
703 {
704 using BlockLoad = rocprim::block_load<T, nthreads, nelms_per_thread,
705 rocprim::block_load_method::block_load_transpose>;
706 using BlockScan = rocprim::block_scan<T, nthreads,
707 rocprim::block_scan_algorithm::using_warp_scan>;
708 using BlockExchange = rocprim::block_exchange<T, nthreads, nelms_per_thread>;
709 using LookbackScanPrefixOp = rocprim::detail::lookback_scan_prefix_op
710 <T, rocprim::plus<T>, ScanTileState>;
711
712 __shared__ struct TempStorage {
713 typename OrderedBlockId::storage_type ordered_bid;
714 union {
715 typename BlockLoad::storage_type load;
716 typename BlockExchange::storage_type exchange;
717 typename BlockScan::storage_type scan;
718 };
719 } temp_storage;
720
721 // Lambda captured tile_state is const. We have to cast the const away.
722 auto& scan_tile_state = const_cast<ScanTileState&>(tile_state);
723 auto& scan_bid = const_cast<OrderedBlockId&>(ordered_block_id);
724
725 auto const virtual_block_id = scan_bid.get(threadIdx.x, temp_storage.ordered_bid);
726
727 // Each block processes [ibegin,iend).
728 N ibegin = static_cast<N>(nelms_per_block) * virtual_block_id;
729 N iend = amrex::min(static_cast<N>(ibegin+nelms_per_block), n);
730
731 auto input_begin = rocprim::make_transform_iterator(
732 rocprim::make_counting_iterator(N(0)),
733 [&] (N i) -> T { return fin(i+ibegin); });
734
735 T data[nelms_per_thread];
736 if (static_cast<int>(iend-ibegin) == nelms_per_block) {
737 BlockLoad().load(input_begin, data, temp_storage.load);
738 } else {
739 // padding with 0
740 BlockLoad().load(input_begin, data, iend-ibegin, 0, temp_storage.load);
741 }
742
743 __syncthreads();
744
745 constexpr bool is_exclusive = std::is_same_v<std::decay_t<TYPE>,Type::Exclusive>;
746
747 if (virtual_block_id == 0) {
748 T block_agg;
749 AMREX_IF_CONSTEXPR(is_exclusive) {
750 BlockScan().exclusive_scan(data, data, T{0}, block_agg, temp_storage.scan);
751 } else {
752 BlockScan().inclusive_scan(data, data, block_agg, temp_storage.scan);
753 }
754 if (threadIdx.x == 0) {
755 if (nblocks > 1) {
756 scan_tile_state.set_complete(0, block_agg);
757 } else if (nblocks == 1 && totalsum_p) {
758 *totalsum_p = block_agg;
759 }
760 }
761 } else {
762 T last = data[nelms_per_thread-1]; // Need this for the total sum in exclusive case
763
764 LookbackScanPrefixOp prefix_op(virtual_block_id, rocprim::plus<T>(), scan_tile_state);
765 AMREX_IF_CONSTEXPR(is_exclusive) {
766 BlockScan().exclusive_scan(data, data, temp_storage.scan, prefix_op,
767 rocprim::plus<T>());
768 } else {
769 BlockScan().inclusive_scan(data, data, temp_storage.scan, prefix_op,
770 rocprim::plus<T>());
771 }
772 if (totalsum_p) {
773 if (iend == n && threadIdx.x == nthreads-1) { // last thread of last block
774 T tsum = data[nelms_per_thread-1];
775 AMREX_IF_CONSTEXPR(is_exclusive) { tsum += last; }
776 *totalsum_p = tsum;
777 }
778 }
779 }
780
781 __syncthreads();
782
783 BlockExchange().blocked_to_striped(data, data, temp_storage.exchange);
784
785 for (int i = 0; i < nelms_per_thread; ++i) {
786 N offset = ibegin + i*nthreads + threadIdx.x;
787 if (offset < iend) { fout(offset, data[i]); }
788 }
789 });
790
791 if (totalsum_p) {
794
795 The_Arena()->free(dp);
796 } else {
798 }
799
800 T ret = (a_ret_sum) ? *totalsum_p : T(0);
801 if (totalsum_p) { The_Pinned_Arena()->free(totalsum_p); }
802
803 return ret;
804}
805
806#elif defined(AMREX_USE_CUDA)
807
808template <typename T, std::integral N, typename FIN, typename FOUT, typename TYPE>
809requires (std::same_as<std::decay_t<TYPE>,Type::Inclusive> ||
810 std::same_as<std::decay_t<TYPE>,Type::Exclusive>)
811T PrefixSum (N n, FIN const& fin, FOUT const& fout, TYPE, RetSum a_ret_sum = retSum)
812{
813 if (n <= 0) { return 0; }
814 constexpr int nwarps_per_block = 8;
815 constexpr int nthreads = nwarps_per_block*Gpu::Device::warp_size; // # of threads per block
816 constexpr int nelms_per_thread = sizeof(T) >= 8 ? 4 : 8;
817 constexpr int nelms_per_block = nthreads * nelms_per_thread;
818 AMREX_ALWAYS_ASSERT(static_cast<Long>(n) < static_cast<Long>(
819 std::numeric_limits<int>::max())*nelms_per_block);
820 int nblocks = (n + nelms_per_block - 1) / nelms_per_block;
821 std::size_t sm = 0;
822 auto stream = Gpu::gpuStream();
823
824 using ScanTileState = cub::ScanTileState<T>;
825 std::size_t tile_state_size = 0;
826 ScanTileState::AllocationSize(nblocks, tile_state_size);
827
828 std::size_t nbytes_tile_state = Arena::align(tile_state_size);
829 auto tile_state_p = (char*)(The_Arena()->alloc(nbytes_tile_state));
830
831 ScanTileState tile_state;
832 tile_state.Init(nblocks, tile_state_p, tile_state_size); // Init ScanTileState on host
833
834 if (nblocks > 1) {
835 // Init ScanTileState on device
836 amrex::launch<nthreads>((nblocks+nthreads-1)/nthreads, 0, stream, [=] AMREX_GPU_DEVICE ()
837 {
838 const_cast<ScanTileState&>(tile_state).InitializeStatus(nblocks);
839 });
840 }
841
842 T* totalsum_p = (a_ret_sum) ? (T*)(The_Pinned_Arena()->alloc(sizeof(T))) : nullptr;
843
844 amrex::launch_global<nthreads> <<<nblocks, nthreads, sm, stream>>> (
845 [=] AMREX_GPU_DEVICE () noexcept
846 {
847 using BlockLoad = cub::BlockLoad<T, nthreads, nelms_per_thread, cub::BLOCK_LOAD_WARP_TRANSPOSE>;
848 using BlockScan = cub::BlockScan<T, nthreads, cub::BLOCK_SCAN_WARP_SCANS>;
849 using BlockExchange = cub::BlockExchange<T, nthreads, nelms_per_thread>;
850
851#ifdef AMREX_CUDA_CCCL_VER_GE_2_8
852 using Sum = cuda::std::plus<T>;
853#else
854 using Sum = cub::Sum;
855#endif
856 using TilePrefixCallbackOp = cub::TilePrefixCallbackOp<T, Sum, ScanTileState>;
857
858 __shared__ union TempStorage
859 {
860 typename BlockLoad::TempStorage load;
861 typename BlockExchange::TempStorage exchange;
862 struct ScanStorage {
863 typename BlockScan::TempStorage scan;
864 typename TilePrefixCallbackOp::TempStorage prefix;
865 } scan_storeage;
866 } temp_storage;
867
868 // Lambda captured tile_state is const. We have to cast the const away.
869 auto& scan_tile_state = const_cast<ScanTileState&>(tile_state);
870
871 int virtual_block_id = blockIdx.x;
872
873 // Each block processes [ibegin,iend).
874 N ibegin = static_cast<N>(nelms_per_block) * virtual_block_id;
875 N iend = amrex::min(static_cast<N>(ibegin+nelms_per_block), n);
876
877 auto input_lambda = [&] (N i) -> T { return fin(i+ibegin); };
878#ifdef AMREX_CUDA_CCCL_VER_GE_2_8
879 thrust::transform_iterator<decltype(input_lambda),thrust::counting_iterator<N> >
880 input_begin(thrust::counting_iterator<N>(0), input_lambda);
881#else
882 cub::TransformInputIterator<T,decltype(input_lambda),cub::CountingInputIterator<N> >
883 input_begin(cub::CountingInputIterator<N>(0), input_lambda);
884#endif
885
886 T data[nelms_per_thread];
887 if (static_cast<int>(iend-ibegin) == nelms_per_block) {
888 BlockLoad(temp_storage.load).Load(input_begin, data);
889 } else {
890 BlockLoad(temp_storage.load).Load(input_begin, data, iend-ibegin, 0); // padding with 0
891 }
892
893 __syncthreads();
894
895 constexpr bool is_exclusive = std::is_same_v<std::decay_t<TYPE>,Type::Exclusive>;
896
897 if (virtual_block_id == 0) {
898 T block_agg;
899 AMREX_IF_CONSTEXPR(is_exclusive) {
900 BlockScan(temp_storage.scan_storeage.scan).ExclusiveSum(data, data, block_agg);
901 } else {
902 BlockScan(temp_storage.scan_storeage.scan).InclusiveSum(data, data, block_agg);
903 }
904 if (threadIdx.x == 0) {
905 if (nblocks > 1) {
906 scan_tile_state.SetInclusive(0, block_agg);
907 } else if (nblocks == 1 && totalsum_p) {
908 *totalsum_p = block_agg;
909 }
910 }
911 } else {
912 T last = data[nelms_per_thread-1]; // Need this for the total sum in exclusive case
913
914 TilePrefixCallbackOp prefix_op(scan_tile_state, temp_storage.scan_storeage.prefix,
915 Sum{}, virtual_block_id);
916 AMREX_IF_CONSTEXPR(is_exclusive) {
917 BlockScan(temp_storage.scan_storeage.scan).ExclusiveSum(data, data, prefix_op);
918 } else {
919 BlockScan(temp_storage.scan_storeage.scan).InclusiveSum(data, data, prefix_op);
920 }
921 if (totalsum_p) {
922 if (iend == n && threadIdx.x == nthreads-1) { // last thread of last block
923 T tsum = data[nelms_per_thread-1];
924 AMREX_IF_CONSTEXPR(is_exclusive) { tsum += last; }
925 *totalsum_p = tsum;
926 }
927 }
928 }
929
930 __syncthreads();
931
932 BlockExchange(temp_storage.exchange).BlockedToStriped(data);
933
934 for (int i = 0; i < nelms_per_thread; ++i) {
935 N offset = ibegin + i*nthreads + threadIdx.x;
936 if (offset < iend) { fout(offset, data[i]); }
937 }
938 });
939
940 if (totalsum_p) {
943
944 The_Arena()->free(tile_state_p);
945 } else {
946 Gpu::freeAsync(The_Arena(), tile_state_p);
947 }
948
949 T ret = (a_ret_sum) ? *totalsum_p : T(0);
950 if (totalsum_p) { The_Pinned_Arena()->free(totalsum_p); }
951
952 return ret;
953}
954
955#endif
956
968template <std::integral N, typename T >
969T InclusiveSum (N n, T const* in, T * out, RetSum a_ret_sum = retSum)
970{
971 if (n <= 0) { return 0; }
972#if defined(AMREX_USE_CUDA)
973 void* d_temp = nullptr;
974 std::size_t temp_bytes = 0;
975 AMREX_GPU_SAFE_CALL(cub::DeviceScan::InclusiveSum(d_temp, temp_bytes, in, out, n,
976 Gpu::gpuStream()));
977 d_temp = The_Arena()->alloc(temp_bytes);
978 AMREX_GPU_SAFE_CALL(cub::DeviceScan::InclusiveSum(d_temp, temp_bytes, in, out, n,
979 Gpu::gpuStream()));
980 T totalsum = 0;
981 if (a_ret_sum) {
982 Gpu::dtoh_memcpy_async(&totalsum, out+(n-1), sizeof(T));
983 }
985 The_Arena()->free(d_temp);
987 return totalsum;
988#elif defined(AMREX_USE_HIP)
989 void* d_temp = nullptr;
990 std::size_t temp_bytes = 0;
991 AMREX_GPU_SAFE_CALL(rocprim::inclusive_scan(d_temp, temp_bytes, in, out, n,
992 rocprim::plus<T>(), Gpu::gpuStream()));
993 d_temp = The_Arena()->alloc(temp_bytes);
994 AMREX_GPU_SAFE_CALL(rocprim::inclusive_scan(d_temp, temp_bytes, in, out, n,
995 rocprim::plus<T>(), Gpu::gpuStream()));
996 T totalsum = 0;
997 if (a_ret_sum) {
998 Gpu::dtoh_memcpy_async(&totalsum, out+(n-1), sizeof(T));
999 }
1001 The_Arena()->free(d_temp);
1003 return totalsum;
1004#elif defined(AMREX_USE_SYCL) && defined(AMREX_USE_ONEDPL)
1005 auto policy = oneapi::dpl::execution::make_device_policy(Gpu::Device::streamQueue());
1006 std::inclusive_scan(policy, in, in+n, out, std::plus<T>(), T(0));
1007 T totalsum = 0;
1008 if (a_ret_sum) {
1009 Gpu::dtoh_memcpy_async(&totalsum, out+(n-1), sizeof(T));
1010 }
1013 return totalsum;
1014#else
1015 if (static_cast<Long>(n) <= static_cast<Long>(std::numeric_limits<int>::max())) {
1016 return PrefixSum<T>(static_cast<int>(n),
1017 [=] AMREX_GPU_DEVICE (int i) -> T { return in[i]; },
1018 [=] AMREX_GPU_DEVICE (int i, T const& x) { out[i] = x; },
1019 Type::inclusive, a_ret_sum);
1020 } else {
1021 return PrefixSum<T>(n,
1022 [=] AMREX_GPU_DEVICE (N i) -> T { return in[i]; },
1023 [=] AMREX_GPU_DEVICE (N i, T const& x) { out[i] = x; },
1024 Type::inclusive, a_ret_sum);
1025 }
1026#endif
1027}
1028
1040template <std::integral N, typename T >
1041T ExclusiveSum (N n, T const* in, T * out, RetSum a_ret_sum = retSum)
1042{
1043 if (n <= 0) { return 0; }
1044#if defined(AMREX_USE_CUDA)
1045 T in_last = 0;
1046 if (a_ret_sum) {
1047 Gpu::dtoh_memcpy_async(&in_last, in+(n-1), sizeof(T));
1048 }
1049 void* d_temp = nullptr;
1050 std::size_t temp_bytes = 0;
1051 AMREX_GPU_SAFE_CALL(cub::DeviceScan::ExclusiveSum(d_temp, temp_bytes, in, out, n,
1052 Gpu::gpuStream()));
1053 d_temp = The_Arena()->alloc(temp_bytes);
1054 AMREX_GPU_SAFE_CALL(cub::DeviceScan::ExclusiveSum(d_temp, temp_bytes, in, out, n,
1055 Gpu::gpuStream()));
1056 T out_last = 0;
1057 if (a_ret_sum) {
1058 Gpu::dtoh_memcpy_async(&out_last, out+(n-1), sizeof(T));
1059 }
1061 The_Arena()->free(d_temp);
1063 return in_last+out_last;
1064#elif defined(AMREX_USE_HIP)
1065 T in_last = 0;
1066 if (a_ret_sum) {
1067 Gpu::dtoh_memcpy_async(&in_last, in+(n-1), sizeof(T));
1068 }
1069 void* d_temp = nullptr;
1070 std::size_t temp_bytes = 0;
1071 AMREX_GPU_SAFE_CALL(rocprim::exclusive_scan(d_temp, temp_bytes, in, out, T{0}, n,
1072 rocprim::plus<T>(), Gpu::gpuStream()));
1073 d_temp = The_Arena()->alloc(temp_bytes);
1074 AMREX_GPU_SAFE_CALL(rocprim::exclusive_scan(d_temp, temp_bytes, in, out, T{0}, n,
1075 rocprim::plus<T>(), Gpu::gpuStream()));
1076 T out_last = 0;
1077 if (a_ret_sum) {
1078 Gpu::dtoh_memcpy_async(&out_last, out+(n-1), sizeof(T));
1079 }
1081 The_Arena()->free(d_temp);
1083 return in_last+out_last;
1084#elif defined(AMREX_USE_SYCL) && defined(AMREX_USE_ONEDPL)
1085 T in_last = 0;
1086 if (a_ret_sum) {
1087 Gpu::dtoh_memcpy_async(&in_last, in+(n-1), sizeof(T));
1088 }
1089 auto policy = oneapi::dpl::execution::make_device_policy(Gpu::Device::streamQueue());
1090 std::exclusive_scan(policy, in, in+n, out, T(0), std::plus<T>());
1091 T out_last = 0;
1092 if (a_ret_sum) {
1093 Gpu::dtoh_memcpy_async(&out_last, out+(n-1), sizeof(T));
1094 }
1097 return in_last+out_last;
1098#else
1099 if (static_cast<Long>(n) <= static_cast<Long>(std::numeric_limits<int>::max())) {
1100 return PrefixSum<T>(static_cast<int>(n),
1101 [=] AMREX_GPU_DEVICE (int i) -> T { return in[i]; },
1102 [=] AMREX_GPU_DEVICE (int i, T const& x) { out[i] = x; },
1103 Type::exclusive, a_ret_sum);
1104 } else {
1105 return PrefixSum<T>(n,
1106 [=] AMREX_GPU_DEVICE (N i) -> T { return in[i]; },
1107 [=] AMREX_GPU_DEVICE (N i, T const& x) { out[i] = x; },
1108 Type::exclusive, a_ret_sum);
1109 }
1110#endif
1111}
1112
1113#else
1114// !defined(AMREX_USE_GPU)
1115template <typename T, std::integral N, typename FIN, typename FOUT, typename TYPE>
1116requires (std::same_as<std::decay_t<TYPE>,Type::Inclusive> ||
1117 std::same_as<std::decay_t<TYPE>,Type::Exclusive>)
1118T PrefixSum (N n, FIN const& fin, FOUT const& fout, TYPE, RetSum = retSum)
1119{
1120 if (n <= 0) { return 0; }
1121 T totalsum = 0;
1122 for (N i = 0; i < n; ++i) {
1123 T x = fin(i);
1124 T y = totalsum;
1125 totalsum += x;
1126 AMREX_IF_CONSTEXPR (std::is_same_v<std::decay_t<TYPE>,Type::Inclusive>) {
1127 y += x;
1128 }
1129 fout(i, y);
1130 }
1131 return totalsum;
1132}
1133
1134// The return value is the total sum.
1135template <std::integral N, typename T >
1136T InclusiveSum (N n, T const* in, T * out, RetSum /*a_ret_sum*/ = retSum)
1137{
1138 std::inclusive_scan(in, in+n, out);
1139 return (n > 0) ? out[n-1] : T(0);
1140}
1141
1142// The return value is the total sum.
1143template <std::integral N, typename T >
1144T ExclusiveSum (N n, T const* in, T * out, RetSum /*a_ret_sum*/ = retSum)
1145{
1146 if (n <= 0) { return 0; }
1147
1148 auto in_last = in[n-1];
1149 std::exclusive_scan(in, in+n, out, T(0));
1150 return in_last + out[n-1];
1151}
1152
1153#endif
1154
1155}
1156
1157namespace Gpu
1158{
1160 template<class InIter, class OutIter>
1161 OutIter inclusive_scan (InIter begin, InIter end, OutIter result)
1162 {
1163#if defined(AMREX_USE_GPU)
1164 auto N = std::distance(begin, end);
1165 if (N <= 0) { return result; }
1166 Scan::InclusiveSum(N, &(*begin), &(*result), Scan::noRetSum);
1167 OutIter result_end = result;
1168 std::advance(result_end, N);
1169 return result_end;
1170#else
1171 return std::inclusive_scan(begin, end, result);
1172#endif
1173 }
1174
1176 template<class InIter, class OutIter>
1177 OutIter exclusive_scan (InIter begin, InIter end, OutIter result)
1178 {
1179#if defined(AMREX_USE_GPU)
1180 auto N = std::distance(begin, end);
1181 if (N <= 0) { return result; }
1182 Scan::ExclusiveSum(N, &(*begin), &(*result), Scan::noRetSum);
1183 OutIter result_end = result;
1184 std::advance(result_end, N);
1185 return result_end;
1186#else
1187 using T = typename std::iterator_traits<InIter>::value_type;
1188 return std::exclusive_scan(begin, end, result, T(0));
1189#endif
1190 }
1191
1192}}
1193
1194#endif
Memory arena base class and global arena accessors.
#define AMREX_ALWAYS_ASSERT(EX)
Definition AMReX_BLassert.H:50
Compiler- and backend-specific extension macros (e.g., restrict, SIMD, inline).
#define AMREX_FORCE_INLINE
Definition AMReX_Extension.H:124
#define AMREX_RESTRICT
Definition AMReX_Extension.H:37
#define AMREX_IF_CONSTEXPR
Definition AMReX_Extension.H:313
#define AMREX_GPU_SAFE_CALL(call)
Definition AMReX_GpuError.H:63
#define AMREX_GPU_ERROR_CHECK()
Definition AMReX_GpuError.H:151
#define AMREX_GPU_DEVICE
Definition AMReX_GpuQualifiers.H:18
Convenience header for the core AMReX GPU facilities.
Array4< int const > offset
Definition AMReX_HypreMLABecLap.cpp:1131
virtual void free(void *pt)=0
Free a previously allocated block pointed to by pt.
virtual void * alloc(std::size_t sz)=0
Allocate sz bytes from this arena.
static std::size_t align(std::size_t sz)
Return the smallest multiple of Arena::align_size that is >= sz bytes.
Definition AMReX_Arena.cpp:167
static constexpr int warp_size
Definition AMReX_GpuDevice.H:236
amrex_long Long
Definition AMReX_INT.H:30
OutIter exclusive_scan(InIter begin, InIter end, OutIter result)
Definition AMReX_Scan.H:1177
T InclusiveSum(N n, T const *in, T *out, RetSum a_ret_sum=retSum)
Inclusive sum.
Definition AMReX_Scan.H:969
OutIter inclusive_scan(InIter begin, InIter end, OutIter result)
Definition AMReX_Scan.H:1161
T ExclusiveSum(N n, T const *in, T *out, RetSum a_ret_sum=retSum)
Exclusive sum.
Definition AMReX_Scan.H:1041
Arena * The_Pinned_Arena()
Definition AMReX_Arena.cpp:855
Arena * The_Arena()
Definition AMReX_Arena.cpp:815
__host__ __device__ constexpr const T & min(const T &a, const T &b) noexcept
Definition AMReX_Algorithm.H:31
__host__ __device__ AMREX_FORCE_INLINE T Add(T *sum, T value) noexcept
Definition AMReX_GpuAtomic.H:200
void freeAsync(Arena *arena, void *mem) noexcept
Definition AMReX_GpuDevice.H:345
void streamSynchronize() noexcept
Definition AMReX_GpuDevice.H:310
void dtoh_memcpy_async(void *p_h, const void *p_d, const std::size_t sz) noexcept
Definition AMReX_GpuDevice.H:435
gpuStream_t gpuStream() noexcept
Definition AMReX_GpuDevice.H:291
static constexpr struct amrex::Scan::Type::Exclusive exclusive
static constexpr struct amrex::Scan::Type::Inclusive inclusive
static constexpr RetSum noRetSum
Definition AMReX_Scan.H:35
static constexpr RetSum retSum
Definition AMReX_Scan.H:34
T PrefixSum(N n, FIN const &fin, FOUT const &fout, TYPE, RetSum a_ret_sum=retSum)
Definition AMReX_Scan.H:811
Definition AMReX_Amr.cpp:50
__host__ __device__ Dim3 begin(BoxND< dim > const &box) noexcept
Return the iterator begin coordinate of box as Dim3.
Definition AMReX_Box.H:2239
void ParallelFor(TypeList< CTOs... > ctos, std::array< int, sizeof...(CTOs)> const &runtime_options, T N, F &&f)
Definition AMReX_CTOParallelForImpl.H:202
const int[]
Definition AMReX_BLProfiler.cpp:1665
__host__ __device__ Dim3 end(BoxND< dim > const &box) noexcept
Return the iterator end coordinate of box as Dim3.
Definition AMReX_Box.H:2257
Definition AMReX_Scan.H:30
bool flag
Definition AMReX_Scan.H:31
Definition AMReX_Scan.H:39
Definition AMReX_Scan.H:38